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vallimaylv/README.md

Hi there 👋

This is Vallimayl V from EEE final year. pronouns: she/her.

I have interests in Digital design, verification, Microarchitecture, Physical design and other relevant fields in the domain.

Reach me at: [email protected] I love to explore all field related to STEM.

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    RISC-V Processor Verilog Design Code is a hardware description language (HDL) implementation of a Reduced Instruction Set Computer (RISC) architecture, specifically the RISC-V ISA. This code define…

    Verilog 1

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