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…upplies Add support for vdda-phy-supply and vdda-pll-supply in the QCS8300 CAMSS binding to reflect camera sensor hardware requirements. Co-developed-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> Link: https://lore.kernel.org/all/20251015130130.2790829-1-quic_vikramsa@quicinc.com
The three instances of CCI found on the QCS8300 are functionally the same as on a number of existing Qualcomm SoCs. Introduce a new SoC-specific compatible string "qcom,qcs8300-cci" with a common fallback. Signed-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Link: https://lore.kernel.org/all/20251015131303.2797800-1-quic_vikramsa@quicinc.com
Add Kaanapali compatible consistent with CAMSS CCI interfaces. Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20251028-add-support-for-camss-on-kaanapali-v4-1-7eb484c89585@oss.qualcomm.com Signed-off-by: Yijie Yang <yijie.yang@oss.qualcomm.com>
Add bindings for Camera Subsystem (CAMSS) on the Qualcomm Kaanapali platform. The Kaanapali platform provides: - 3 x VFE (Video Front End), 5 RDI per VFE - 2 x VFE Lite, 4 RDI per VFE Lite - 3 x CSID (CSI Decoder) - 2 x CSID Lite - 6 x CSIPHY (CSI Physical Layer) - 2 x ICP (Image Control Processor) - 1 x IPE (Image Processing Engine) - 2 x JPEG DMA & Downscaler - 2 x JPEG Encoder - 1 x OFE (Offline Front End) - 5 x RT CDM (Camera Data Mover) - 3 x TPG (Test Pattern Generator) Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Add support for Kaanapali in the camss driver. Add high level resource information along with the bus bandwidth votes. Module level detailed resource information will be enumerated in the following patches of the series. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Add more detailed resource information for CSIPHY devices in the camss driver along with the support for v2.4.0 in the 2 phase CSIPHY driver that is responsible for the PHY lane register configuration, module reset and interrupt handling. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Add more detailed resource information for CSID devices along with the driver for CSID gen4 that is responsible for CSID register configuration, module reset and IRQ handling for BUF_DONE events. And aggregate a common definition 'CSI2_RX_CFG0_PHY_SEL_BASE_IDX' into csid header file. In this CSID version, RUP and AUP update values are split into two registers along with a SET register. Accordingly, enhance the CSID interface to accommodate both the legacy combined reg_update and the split RUP and AUP updates. Co-developed-by: Atiya Kailany <atiya.kailany@oss.qualcomm.com> Signed-off-by: Atiya Kailany <atiya.kailany@oss.qualcomm.com> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Add Video Front End (VFE) version gen4 as found on the Kaanapali SoC. The FULL front end modules in Kaanapali camera subsystem are called TFEs (Thin Front End), however, retaining the name VFE at places to maintain consistency and avoid unnecessary code changes. This change limits the VFE output lines to 3 for now as constrained by the CAMSS driver framework. Kaanapali architecture requires for the REG_UPDATE and AUP_UPDATE to be issued after all of the CSID configuration has been done. Additionally, the number of AUP_UPDATEs should match the number of buffers enqueued to the write master while it's being enabled. Although the real time data from TFE goes through the RT_CAMNOC, we are required to enable both the camnoc_rt_axi and camnoc_nrt_axi clocks for the PDX_NOC, that follows both the RT and NRT NOCs in this architecture, to ensure that both of the latter are idle after reset. Co-developed-by: Atiya Kailany <atiya.kailany@oss.qualcomm.com> Signed-off-by: Atiya Kailany <atiya.kailany@oss.qualcomm.com> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
Signed-off-by: HangxiangMa <hangxiang.ma@oss.qualcomm.com>
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Add KNP camss driver for mainline due to long time pending by Bryan CSIPHY change. The driver relative files are listed below.